Director of Package Design

Job Title

Director of Package Design

Role Summary

Lead the advanced package design team within Microsoft Silicon (SCHIE / CSME) to define, develop, and deliver 2.5D/3D packaging solutions for Azure datacenter products. The role combines technical leadership, cross-functional collaboration, supplier management, and execution from definition through tapeout and production qualification.

Experience Level

Senior-level. Typical candidates will have multi-year leadership and hands-on experience in semiconductor package design; the posting specifies experience expectations ranging from ~8+ years for senior technical contributors to 15+ years preferred for extensive hands-on and leadership experience.

Responsibilities

Drive technical strategy and execution for advanced packaging across product lines and suppliers.

• Lead, mentor, and grow a team of package design engineers.
• Define and deliver package architectures for chiplet, 2.5D and 3D packaging (bridge/interposer/substrate).
• Drive designs from definition to tapeout, including package and assembly drawings for manufacturing.
• Develop and execute test vehicles and validation plans to verify silicon, package, and system performance.
• Perform supplier assessments and manage suppliers through development, qualification and production.
• Conduct reliability characterization and FMEA for packaging options.
• Specify EDA tool requirements and collaborate on layout, electrical, mechanical, thermal co-design and modelling.
• Collaborate closely with silicon architects, board designers, thermal and power engineers to implement platform solutions.

Requirements

Must-have technical skills, leadership capabilities, and security/export eligibility; degree details are summarized under Education Requirements below.

• Proven hands-on experience in semiconductor package design, development, and manufacturing (including 2.5D/3D packaging).
• Experience driving package designs through definition, development, qualification, and production at scale.
• Supplier and subcontract management experience with OSATs, foundries, and contract manufacturers.
• Reliability assessment and failure analysis experience; ability to develop and deliver FMEAs.
• Strong cross-functional communication and program leadership across silicon, PCB, thermal, and systems teams.
• Ability to meet Microsoft security screening and export-control eligibility requirements.

Nice-to-have:

• Experience with advanced package CAD/layout tools (e.g., Cadence Allegro) and 2D/3D simulation tools for power and signal extraction.
• Deep familiarity with high-speed signaling, mechanical/thermal co-design, physical failure analysis, and supplier qualification processes.

Education Requirements

The posting lists degree-based equivalencies: PhD in EE/CE/CS or related field with ~3+ years technical experience; Master’s with ~6+ years; Bachelor’s with ~8+ years; or equivalent experience. Preferred qualifications also reference PhD/Master’s/Bachelor’s in Physics, Electrical Engineering, Computer Engineering, Computer Science, Chemistry or related fields with higher experience thresholds (preferred: ~15+ years). The posting explicitly permits equivalent practical experience in lieu of formal degrees.

About the Company

Company: Microsoft

Headquarters: Redmond, Washington, United States

Microsoft is a global technology company that develops and sells software, services, devices, and solutions. Known for its Windows operating system, Office suite, and Azure cloud platform, Microsoft aims to empower individuals and organizations around the world to achieve more. The company fosters a culture of innovation and inclusion, focusing on delivering trusted experiences to customers and partners globally.