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Director of Advanced IC Packaging Development

Renesas
May 13, 2026
Full-time
On-site
San Jose, California, United States
$200,000 - $250,000 USD yearly
Process Engineering Jobs, Level - Senior

Job Title

Director of Advanced IC Packaging Development

Role Summary

Lead the global roadmap and execution for advanced power IC packaging, from R&D and NPI through qualification and high-volume manufacturing. Responsible for technology strategy, OSAT selection and qualification, and driving manufacturability, reliability, and production ramp for power SiP/modules, wafer-level and flip-chip packaging, and wide-bandgap devices.

Position is within Engineering in San Jose and focuses on improving power density and thermal efficiency for datacenter and AI applications.

Experience Level

Senior; 15–20 years of relevant semiconductor package development experience.

Responsibilities

Primary responsibilities include technology roadmap, global OSAT management, NPI to HVM, qualification, quality control, and cross-functional leadership.

  • Define and execute global packaging roadmap for Power SiP/modules, wafer-level packaging, and flip-chip technologies.
  • Lead R&D initiatives for SiC and GaN wide-bandgap power devices and advanced substrates (e.g., DBC, AMB).
  • Manage R&D budget and customer adoption programs; establish package design rules to ensure manufacturability and reliability.
  • Benchmark, select, qualify, and manage global OSATs and contract manufacturers; run DOE with partners to optimize assembly processes and process specifications.
  • Lead NPI and qualification efforts to transition products from R&D to high-volume manufacturing; collaborate with Product and Reliability teams to meet aggressive timelines.
  • Implement SPC and production monitoring; identify and resolve process integration and yield issues during ramp.
  • Serve as technical authority for customer complaints; perform root-cause analysis and drive corrective actions across functions.

Requirements

Must-have technical skills and experience; nice-to-have items indicated.

  • Deep practical experience in power SiP/modules, flip-chip, and wafer-level packaging assembly and integration.
  • Proven track record with NPI, qualification methods, SPC, statistical analysis tools, and DOE execution.
  • Experience managing OSAT selection, qualification, and supply chain for new package technologies at scale.
  • Familiarity with advanced substrates and interconnect methods (e.g., DBC, AMB, wire-bonding, multi-chip modules).
  • Strong leadership, interpersonal, presentation, analytical, and communication skills; experience leading cross-functional teams.
  • Nice-to-have: hands-on experience with Smart Power Stages and Vertical Power Stage architectures.

Education Requirements

Doctorate, Master’s, or Bachelor’s degree in Physics, Chemistry, Mechanical Engineering, Electrical Engineering, or Materials Engineering.


About the Company

Company: Renesas

Headquarters: Hitachinaka, Japan

Renesas is a global leader in embedded semiconductor solutions, providing high-quality products across automotive, industrial, infrastructure, and IoT sectors. With over 22,000 employees in more than 30 countries, the company focuses on scalable solutions that enhance user experience and drive innovation while committed to sustainability and energy efficiency.

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Date Posted: 2026-05-04