Director, High Speed SerDes Application Engineering

Job Title

Director, High Speed SerDes Application Engineering

Role Summary

Lead the application engineering team responsible for enabling Marvell’s high-speed SerDes IP across internal business units and external customers. Serve as the primary technical authority bridging SerDes IP development and real-world system deployment.

The role sits in Central Engineering (Central System Engineering) and focuses on validation, characterization, and application engineering support for high-speed SerDes and analog macros across multiple market verticals.

Experience Level

Senior level. Requires at least 5+ years of direct people management and technical leadership experience.

Responsibilities

Primary responsibilities include team leadership, technical delivery, customer engagement, and cross-functional alignment.

• Build, mentor, and manage a distributed application engineering team; define team charter, technical direction, and drive execution against program milestones.
• Lead application engineering support for high-speed SerDes IP (NRZ and PAM4 up to 224G+) across protocols such as PCIe, Ethernet (10G–800G), Fibre Channel, CPRI, and CEI.
• Drive post-silicon bring-up, debug, and lab characterization of SerDes blocks including PLL/CDR, ADC/DAC, TX FFE, RX CTLE/DFE, and signal integrity optimization.
• Develop evaluation kits, reference designs, application notes, white papers, and other technical collateral for internal and external use.
• Provide technical leadership on signal integrity analysis, channel modeling, and compliance testing for high-speed electrical and optical interfaces.
• Engage with internal business units and external customers on design reviews, system bring-up, and performance optimization.
• Represent the company at industry conferences and standards bodies and participate in customer technical forums.
• Collaborate with SerDes design, DSP algorithm, physical design, and software teams to ensure IP is production-ready and customer-deployable.

Requirements

Must-have technical and leadership qualifications; preferred items listed separately.

• Must-have: 5+ years of direct people management and technical leadership.
• Must-have: Deep expertise in high-speed SerDes architecture and analog/mixed-signal circuits (NRZ and PAM4 at 56G, 112G, 224G+).
• Must-have: Hands-on experience with post-silicon bring-up and lab characterization using oscilloscopes, BERTs, VNAs, and spectrum analyzers.
• Must-have: Solid understanding of high-speed interface protocols and standards (PCIe Gen5/6, 100G/400G/800G Ethernet, Fibre Channel, CPRI, OIF CEI).
• Must-have: Experience with high-speed PCB design, channel simulation tools, and compliance testing.
• Must-have: Proven ability to lead multi-disciplinary teams in a matrixed organization; excellent communication and presentation skills; ability to travel ~20%.
• Must-have: Eligibility to access export-controlled technology as required by applicable law.
• Nice-to-have: Experience with electro-optical systems and optical transceiver applications.
• Nice-to-have: Scripting and automation skills (Python, MATLAB, C/C++) for test and characterization workflows.
• Nice-to-have: Background in AI/ML infrastructure or hyperscale data center applications; prior experience in a semiconductor IP organization.

Education Requirements

Not specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.