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Director, Design Verification

Marvell Technology
May 17, 2026
Full-time
On-site
Santa Clara, California, United States
$195,180 - $292,400 USD yearly
Verification Jobs, Level - Senior

Job Title

Director, Design Verification

Role Summary

Lead Marvell's Design Verification organization responsible for verification, emulation and post-silicon validation of ASIC and SoC products. The role drives verification strategy, methodologies, tool selection, and cross-functional execution to deliver high-quality silicon for enterprise, cloud, AI and carrier markets.

The position manages and grows an engineering team, coordinates with architecture, design, DFT, physical design, firmware and system teams, and ensures verification schedules, quality goals, and productivity improvements are met.

Experience Level

Senior — requires extensive leadership experience. Posting specifies 20+ years with a Bachelor's, or 15+ years with an advanced degree; expect equivalent senior-level industry experience.

Responsibilities

Primary responsibilities include technical leadership, program execution, and team development.

  • Lead execution of design verification (DV), emulation and post-silicon validation with a zero-defect mindset.
  • Define DV, emulation and post-silicon validation scope, timelines and verification strategies.
  • Specify and drive testbench architectures and DV methodologies.
  • Collaborate with Architecture, Design, DFT, Physical Design, Firmware and system teams to ensure successful product delivery.
  • Evaluate and select verification tools and infrastructure; drive productivity improvements.
  • Monitor industry DV trends and adapt verification approaches accordingly.
  • Recruit, build, retain and develop a high-performance verification engineering team; address ongoing training needs.

Requirements

Core must-have skills and experience for successful performance in this role.

  • Extensive experience in ASIC/SoC verification and delivery of production silicon.
  • Strong understanding of the ASIC development lifecycle and verification flow.
  • Experience with SoC architecture, processor cores, memory subsystems and peripheral interfaces.
  • Proven leadership of multi-disciplinary ASIC development teams and cross-functional collaboration.
  • Experience defining DV methodologies, testbench architectures, and driving emulation/post-silicon validation.
  • Track record of tool evaluation/selection and driving verification productivity improvements.
  • Excellent communication, interpersonal, presentation and stakeholder-management skills.

Education Requirements

Bachelor’s degree in Computer Science, Electrical Engineering or related field with 20+ years of related professional experience; or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related field with 15+ years of related experience.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-05-16