Director, CAD Design Engineering & EDA Infrastructure

Job Title

Director, CAD Design Engineering & EDA Infrastructure

Role Summary

Lead development, deployment, and optimization of EDA methodologies, design automation flows, and compute infrastructure to support semiconductor design across the organization. Manage a global CAD/EDA team and coordinate with design, verification, and IT groups to deliver scalable, high-quality design flows.

Experience Level

Senior — requires approximately 15+ years in semiconductor design with at least 7 years in EDA/methodology leadership.

Responsibilities

Provide technical and organizational leadership for EDA, methodology, and infrastructure. Key responsibilities include:

• Define and drive long-term EDA strategy, methodologies, flows, and infrastructure.
• Architect and implement RTL-to-GDSII flows covering verification, synthesis, place & route, timing closure, and sign-off.
• Oversee compute farms, license servers, cloud integration, and tool deployment to ensure scalability and efficiency.
• Evaluate, benchmark, and deploy EDA tools; manage vendor relationships and negotiate supplier agreements.
• Introduce automation and AI/ML-driven solutions to accelerate design productivity and efficiency.
• Build, mentor, and lead a high-performing global CAD/EDA engineering team.
• Establish process standardization, documentation, and training for design teams worldwide.
• Identify and mitigate risks in tool flows, infrastructure, and project schedules.

Requirements

Must-have qualifications and skills:

• 15+ years in semiconductor design with at least 7 years leading EDA/methodology teams.
• Deep technical knowledge of RTL design and verification, synthesis, place & route, timing analysis, and sign-off flows.
• Experience managing compute infrastructure, license management, and cloud-based design environments.
• Proven ability to lead global engineering teams, manage vendor relationships, and drive organizational change.
• Strong communication, negotiation, and strategic planning skills.

Nice-to-have:

• Experience applying AI/ML or GenAI to EDA flows and automation.

Education Requirements

Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field (specified).

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.