Director, ASIC Verification
NetpremeJob Title
Director, ASIC Verification
Role Summary
The Director of ASIC Verification will own verification strategy, sign-off, and lead the verification organization while remaining a hands-on engineer who authors testbenches, closes coverage, and debugs complex failures. This role reports to engineering leadership and is based onsite in Santa Clara, CA.
Experience Level
Senior-level role. Requires substantial ASIC/SOC verification experience and leadership: typically 8+ years of verification experience with 5+ years leading verification teams.
Responsibilities
Accountable for verification end-to-end and for building and communicating the teams readiness and risk posture.
- Define and own verification strategy and methodology (UVM, formal, emulation, coverage-driven closure) through tape-out sign-off.
- Architect, author, and review verification environments and test plans; review testbench code in detail.
- Drive debug of complex protocol, coverage, and bring-up issues; generate test vectors and support post-silicon bring-up.
- Recruit, lead, and develop a high-caliber verification organization focused on technical depth.
- Present verification readiness, metrics, and risk to executive and engineering leadership.
Requirements
Must-have technical experience and leadership skills for immediate impact.
- 8+ years of progressive ASIC/SOC verification experience and 5+ years leading verification teams.
- Proven hands-on experience writing verification code, building testbenches, and achieving coverage closure.
- Multiple tape-outs on advanced process nodes with ownership of technical work and sign-off.
- Practical experience with high-speed protocol IP such as Ethernet, UCIe, UALink, or comparable interfaces.
- Familiarity with the full ASIC/SOC lifecycle (microarchitecture through tape-out) including interconnect, I/O, and memory subsystems.
- Strong executive communication; experience managing risk, escalations, budget, and headcount on fast timelines.
Nice-to-have:
- Hands-on post-silicon bring-up, debug, and validation leadership.
- Experience building a verification team at an early-stage startup while delivering milestones personally.
- Background in AI/datacenter accelerators and familiarity with LLM memory/dataloader bottlenecks.
- Knowledge of DFT and its interaction with front-end verification.
Education Requirements
Required: BS or MS in Electrical Engineering, Computer Engineering, or a related field. Preferred: PhD in EE, CE, or related field. (No mention of equivalent-experience language.)
About the Company
Company: Netpreme
Headquarters: Santa Clara, CA, United States
Early-stage startup developing ASIC memory-acceleration solutions for AI and data-center workloads. Focused on designing high-performance silicon, IP and subsystems to improve efficiency and performance for large language models and other AI applications.
