Digital Verification Intern
Internship on the Design Engineering team supporting digital verification for SoC projects. Work with experienced engineers to develop verification environments, translate design specifications into verification tasks, and contribute to virtual component and SoC verification activities.
This role is focused on practical, hands-on learning and mentorship in an industrial SoC verification environment.
Entry-level / Internship. Suitable for current students (final-year) or recent graduates; no professional experience required beyond relevant coursework or projects.
Primary responsibilities include:
Essential technical skills and attributes:
Nice-to-have:
Currently studying towards, or recently completed, a BSc in Electronic Engineering, Micro-Electronic Engineering, Computer Science, or a related technical field (including final-year students). Candidates working toward an MSc and those seeking to complete a BSc/MSc thesis with the company are welcome. Equivalent practical experience is also considered.
Apply: Apply online
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

Date Posted: 2026-04-27