Digital Verification Engineer

Job Title

Digital Verification Engineer

Role Summary

Verify digital and mixed-signal ICs and large-scale SoCs pre-silicon using a metric-driven verification flow. Work on block- and system-level verification, hardware-software co-design, and AI-augmented testbench development and regression analysis under guidance from experienced engineers.

Experience Level

Mid-level. No explicit years-of-experience requirement stated; role is listed as a graduate job and is open to early-career candidates as well.

Responsibilities

Primary responsibilities include planning and executing verification activities across modules and systems, developing testbenches, and driving closure on functional and coverage goals.

• Define verification scope, features, and coverage goals from specifications.
• Develop and maintain block- and system-level testbenches using SystemVerilog, UVM, or C++.
• Create test cases, run regressions, and drive functional and coverage closure.
• Investigate and debug failures across RTL, testbench, and system boundaries; coordinate fixes with design teams.
• Support formal verification, directed testing, and FPGA-based validation.
• Apply agentic AI tools to accelerate verification tasks while validating and owning their outputs.

Requirements

Must-have skills and attributes for the role.

• Solid understanding of digital logic design and the IC design flow.
• Familiarity with SystemVerilog, UVM, or C++ and simulation-based verification concepts.
• Ability to define and prove correct behavior against specifications rather than only exercising scenarios.
• Healthy skepticism: cross-check results and validate plausibility before trusting outcomes.
• Quick learner comfortable adopting new tools and evolving methodologies, including AI-augmented tools.
• Strong collaboration skills and sufficient English for daily technical communication and documentation.

Nice-to-have:

• Scripting experience (Python, Perl, Tcl).
• Hands-on use of AI coding assistants or agentic development tools.
• Experience with AI/ML for edge deployment (inference, quantization, real-time constraints).
• Exposure to formal verification techniques, SVA, or coverage closure practices.
• Familiarity with bus protocols and verification IP (AXI, AHB, APB) and system-level integration.
• Domain experience such as DSP/audio systems, embedded processor architectures, high-speed/low-latency connectivity, closed-loop control systems, analog/mixed-signal co-simulation, or functional-safety verification.

Education Requirements

Posting indicates a graduate role. Preferred: Masters degree or above, open to a wide range of STEM majors (electronics, microelectronics, computer science, mathematics, physics, automation, etc.).

About the Company

Company: Analog Devices

Headquarters: Norwood, Massachusetts, USA

Analog Devices is a leading global semiconductor company that bridges the physical and digital worlds, enabling breakthroughs at the Intelligent Edge. With a focus on innovation, ADI develops solutions that drive advancements in digitized factories, mobility, and digital healthcare. The company employs around 24,000 people globally and reported revenues exceeding $9 billion in FY24, creating technologies that transform lives across various sectors.