Job Title
Digital Physical Design Engineer
Role Summary
Responsible for physical implementation and timing convergence of digital ASIC/SoC blocks, focusing on synthesis, place & route, static timing analysis, and ECO implementation. Works with RTL, DFT, and signoff teams to drive designs to tapeout-ready quality.
Experience Level
Mid-level (experienced engineer). No specific years of experience listed in the posting.
Responsibilities
Primary responsibilities include:
- Perform synthesis, place-and-route (PnR), and static timing analysis (STA) to achieve timing closure.
- Identify and resolve setup and hold violations; implement ECOs and timing fixes.
- Develop and maintain timing constraints and signoff-quality runflows.
- Debug timing and physical issues across multiple modes and corners.
- Optimize designs for performance and area.
- Collaborate with RTL, DFT, and signoff teams to ensure tapeout readiness.
Requirements
Key requirements:
- Proven expertise in synthesis, place & route (PnR), static timing analysis (STA), and ECO implementation.
- Hands-on experience with industry-standard EDA tools and constraint development.
- Ability to drive timing closure and resolve setup/hold violations across modes and corners.
- Experience collaborating with RTL, DFT, and signoff teams toward tapeout readiness.
Nice to have:
- Practical experience optimizing designs for performance and area.
- Familiarity with tapeout flows and signoff processes.
Education Requirements
Not specified.
About the Company
Company: NXP Semiconductors
Headquarters: Nijmegen, Netherlands
NXP Semiconductors N.V. is a global semiconductor company that provides High Performance Mixed Signal and Standard Product solutions. With over 45,000 employees and operations in more than 35 countries, NXP is a leader in secure connectivity solutions for embedded applications, catering to automotive, industrial IoT, mobile, and communication infrastructure markets. The company is committed to innovation and sustainability, advancing a smarter, safer, and more sustainable world through technology.

Date Posted: 2026-07-10