Digital Logic Design Apprenticeship
12-month, full-time in-office apprenticeship on mixed-signal digital logic and verification for high-speed NRZ and PAM SerDes PHY IP. You will work with design and verification teams to implement and verify PHY IP and acquire practical experience in industry-standard methodologies.
Entry-level apprenticeship for fresh graduates (class of 2026). No prior full-time industry experience required; limited internship experience acceptable.
Hands-on contribution within design and verification teams; training and mentorship provided.
Must-have skills and eligibility criteria; preferred items listed below.
B.E. / B.Tech in Electronics, Electrical, Instrumentation, or related technical fields is expected. Candidates should be fresh graduates (class of 2026) and not enrolled in M.Tech or other postgraduate diploma programs. Limited internship experience is acceptable; no explicit alternative "equivalent experience" language provided.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
