Digital Design Verification Intern

Job Title

Digital Design Verification Intern

Role Summary

Intern on the ASIC design verification team focused on VLSI verification for coherent optical communications used in Data Center Interconnect (DCI), long-haul and metro applications.

The role supports development of verification environments and testbenches to validate digital designs implementing high-speed communications, signal processing, and protocol features.

Experience Level

Entry-level internship for students nearing graduation (student status required; see Education Requirements for details).

Responsibilities

Day-to-day responsibilities include:

• Develop verification test plans.
• Implement UVM verification components and environments.
• Create and automate test cases and regression flows.
• Measure functional coverage against specifications.
• Port verification regressions across teams.
• Write scripts and automation to support verification tasks.

Requirements

Must-have technical skills and conditions:

• Knowledge of object-oriented programming (OOP).
• Familiarity with digital description and verification concepts (Verilog, SystemVerilog).
• Some experience with Python scripting for modeling and automation.
• Ability to work part-time as an intern and collaborate with verification teams.
• May require eligibility to access export-controlled technology; non-U.S. citizens may be subject to an export license review.

Education Requirements

Must be actively pursuing a degree in Electronic Engineering or a related technical field and be close to graduation (fewer than 5 final exams remaining or less than one year until degree completion).

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.