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Die Attach Manufacturing Engineer — Process & Equipment (Silicon Photonics / PIC Packaging)

Lumilens
August 31, 2026
Full-time
On-site
Singapore, SG
Process Engineering Jobs, Level - Mid-Career

Job Title

Die Attach Manufacturing Engineer — Process & Equipment (Silicon Photonics / PIC Packaging)

Role Summary

Lead development, qualification, optimization, and sustaining of die attach processes and equipment for photonic integrated circuits (PICs), silicon photonics dies, and co-packaged optical/electronic modules. Focus on achieving sub-micron placement accuracy, optical-grade attach quality, and reliable production throughput across epoxy/adhesive, eutectic/AuSn solder, and flip-chip bonding methods.

Experience Level

Mid-level to senior (3–7 years of relevant industry experience preferred).

Responsibilities

Deliver and sustain die attach process and equipment capability to meet product and production targets.

  • Develop, characterize, qualify, and optimize die attach processes for PIC/silicon photonics dies, laser dies, and hybrid EIC-PIC assemblies (active/passive alignment, epoxy attach, AuSn/eutectic, flip-chip).
  • Define process specifications, work instructions, control plans, and DOE-based process windows for sub-micron placement and controlled bond-line thickness.
  • Lead root-cause analysis and CAPA for photonics-specific yield issues (optical misalignment, coupling loss, epoxy outgassing, die tilt, voids).
  • Specify, qualify, install, and commission high-precision die attach and alignment equipment; own equipment uptime, OEE, and preventive maintenance.
  • Partner with Materials, Optical Design, Quality, and Reliability on material qualification, failure analysis, and reliability testing (thermal cycling, humidity, shear/pull, X-ray/CSAM).
  • Implement SPC/Cpk monitoring and drive process improvements to reduce variation and coupling loss.
  • Work with vendors for tool upgrades, retrofits, spares, and escalations; support CAPEX planning and NPI ramp activities.
  • Provide training and documentation for technicians and operators; track KPIs including yield, Cpk, uptime, scrap rate, and cycle time.

Requirements

Must-have technical skills and experience for role success.

  • 3–7 years of hands-on experience in silicon photonics/PIC packaging focused on die attach process/equipment engineering.
  • Direct experience with silicon photonics and/or III-V laser dies: wafer/die handling, dicing, facet protection, and optically sensitive die placement.
  • Practical knowledge of die attach materials and methods for photonics: low-outgassing/optical-grade epoxies, UV-cure adhesives, AuSn/eutectic solder, flip-chip techniques, and associated failure modes.
  • Experience with high-precision die/fiber attach equipment (examples: Besi, Palomar, Finetech, Set, PI or equivalents) and vision/sub-micron motion systems.
  • Proficiency with DOE, SPC, Cpk analysis, and structured problem-solving methods (8D, 5-Why, Fishbone).
  • Understanding of photonic packaging architectures (transceiver modules, co-packaged optics, hybrid integration) and their alignment requirements.
  • Strong analytical troubleshooting skills at sub-micron/micron tolerances and ability to read optical/mechanical drawings and manuals.

Nice-to-have:

  • Experience in high-volume silicon photonics or PIC packaging houses, active alignment with real-time optical feedback, hermetic packaging, TECs, or laser die attach for telecom/datacom.
  • Six Sigma Green/Black Belt, familiarity with Minitab/JMP, MES/data systems, automation/robotics experience, and cleanroom manufacturing exposure.

Education Requirements

Bachelor's degree in Electrical, Mechanical, Materials, Optical/Photonics Engineering or a related engineering field; Master’s degree preferred for senior roles.


About the Company

Company: Lumilens

Headquarters: San Jose, CA, USA

Lumilens develops integrated photonics and optical interconnect solutions for high-speed data communication and chip-to-chip interfaces, focusing on optical front-end hardware and co-packaged optics for advanced semiconductor systems.

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Date Posted: 2026-08-29