DFT Staff Engineer

Role Summary

The DFT Staff Engineer will engage in various phases of System on Chip (SoC) Design for Test (DFT) activities. This includes DFT architecture development, implementation of test insertion and verification processes, as well as working on pattern generation and post-silicon debug to ensure product test metrics are met.

Experience Level

The role is intended for candidates who have comprehensive knowledge of DFT concepts and practical experience in areas such as ATPG, MBIST, and IJTAG. The ideal candidate should have a strong background in DFT insertion and verification, including skills in coverage improvement and vector simulation.

Responsibilities

The responsibilities of the DFT Staff Engineer include:

• Executing DFT related activities throughout the design process.
• Collaborating closely with Physical Design and Static Timing Analysis (STA) teams for DFT mode timing closure.
• Conducting post-silicon debug to improve yield.
• Interacting directly with external customers as required.

Requirements

Applicants should possess an in-depth understanding of DFT methodologies and demonstrate solid experience with DFT-related tools and techniques. Strong problem-solving skills are essential.

Education Requirements

A bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field is required for this position.