Job Title
DFT Lead Engineer
Role Summary
The DFT Lead Engineer will be responsible for developing advanced microcontroller-based motor driver solutions with a focus on Design for Testability (DFT) for SoCs. The role involves collaboration with various engineering teams to ensure the successful implementation of DFT methodologies.
Experience Level
Mid-level; more than 4 years of hands-on experience in DFT aspects of SoC Design is preferred.
Responsibilities
The responsibilities include:
- Defining DFT architecture for subsystems and SoCs to meet automotive-grade safety and security standards.
- Collaborating with cross-functional teams to derive requirements and align DFT goals.
- Working with Product and Test Engineering teams to address test needs and optimize test costs.
- Ensuring high-quality and timely DFT implementation by partnering with various teams.
Requirements
The ideal candidate should possess:
- Bachelor’s or Master’s degree in Electrical Engineering, Electronics & Communication Engineering, Computer Science, or a related field.
- Strong understanding of Verilog/VHDL and DFT concepts.
- Proficiency in scan architectures and memory test techniques.
- Experience with silicon bring-up and debugging.
- Familiarity with tools such as Modus, Genus, Xcelium, and Jasper.
- Excellent problem-solving skills and strong communication abilities.
- Optional: Experience with mixed-signal analog designs and knowledge of advanced automation scripting (Python, Perl, or TCL).
Education Requirements
Bachelor’s or Master’s degree in Electrical Engineering, Electronics & Communication Engineering, Computer Science, or a related field.
About the Company
Company: Texas Instruments
Headquarters: Dallas, Texas, USA
Texas Instruments is a global semiconductor company that designs, manufactures, and sells analog and embedded processing chips for various markets including industrial, automotive, and personal electronics. The company's innovations aim to make electronics more affordable and reliable, fostering advancements in technology through each generation of semiconductors.

Date Posted: 2026-02-25