DFT Intern - 2027

Job Title

DFT Intern - 2027

Role Summary

Work on design-for-test (DFT) methodology for NVIDIA chips, covering strategy, logic design and insertion, pre-silicon verification, test pattern generation, and ATE bringup. The role supports validation, yield debug and failure analysis for production ramp.

Experience Level

Internship - entry-level.

Responsibilities

Contribute to DFT implementation and test methodology across pre-silicon and production bringup phases.

• Implement and verify DFT logic and infrastructure.
• Maintain DFT flow and run regression suites.
• Execute DFT verification and debug failures.
• Generate test patterns and support pattern bringup.
• Support ATE bringup, validation, yield debug, and failure analysis for production ramp.

Requirements

Must-have technical skills and core attributes for the role.

• Strong logic design and verification background.
• Basic knowledge of DFT concepts and flows.
• Proficient in Verilog HDL.
• Skilled in Perl and Tcl scripting.
• Strong problem solving, communication, and teamwork skills.
• Nice-to-have:
  • Experience with logic simulators and debug tools (vcs, ncsim, verdi).
  • Familiarity with C/C++ and Makefile workflows.

Education Requirements

Pursuing a Master’s (MS) or PhD degree in Electrical Engineering (EE).

About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.