Job Title
DFT Engineer
Role Summary
Work on design-for-test (DFT) features and test strategy for mixed-signal ASIC designs. Implement and validate DFT using defined CAD tools and flows, verify ATE test suites, and support hardware bring-up and manufacturing test.
Experience Level
Mid-level. Years of experience not specified.
Responsibilities
Primary responsibilities include:
- Analyze, design, and implement DFT features using defined CAD tools and flows.
- Pick up and run CAD tool flows for assigned designs.
- Simulate and verify ATE test suites at IP, block, and top-level netlist.
- Define and implement test strategy for complex mixed-signal circuits.
- Collaborate with global CAD and design teams to resolve flow issues and improve features.
- Provide debug and support to manufacturing test team during hardware bring-up.
- Develop specifications and maintain design documentation.
Requirements
Must-have skills and experience:
- Practical experience in DFT development and implementation for ASIC designs.
- Proficiency with CAD tools and established design flows.
- Experience with simulation and verification of ATE/test suites at IP/block/top levels.
- Ability to debug test failures and support silicon bring-up.
- Effective cross-team collaboration and communication skills.
Nice-to-have:
- Experience with mixed-signal test strategies and ATE environments.
- Experience working with global CAD teams on flow fixes and feature improvements.
Education Requirements
Not specified.
About the Company
Company: Lumiere Systems
Engineering services firm specializing in semiconductor and ASIC design and verification for ARM-based SoCs. Engages in full verification lifecycle (UVM/SystemVerilog, formal, gate-level simulation) and collaborates with global verification teams and client partners.

Date Posted: 2026-06-03