DFT Engineer
FSTONE Technologies
November 2, 2026
Contract
Remote friendly (San Jose, California, United States)
Worldwide
DFT Jobs, Level - Mid-Career
Job Title
DFT Engineer
Role Summary
Work on design-for-test (DFT) implementation and verification for ASIC projects. The role is on a hybrid schedule based in San Jose, CA and is expected to support a contract engagement of 12+ months.
Experience Level
Mid-level. No specific years-of-experience stated.
Responsibilities
Primary responsibilities focus on implementing and validating DFT features and diagnosing issues in a timely manner.
- Perform DFT insertion and verification across designs.
- Use Tessent toolset for scan, memory BIST, repair, IJTAG, and test compression flows.
- Troubleshoot and debug DFT-related issues under schedule pressure.
- Collaborate with design and verification teams to close DFT-related bugs and test coverage gaps.
Requirements
Must-have technical skills and tools experience:
- Solid understanding of DFT fundamentals and methodology.
- Proven experience with DFT insertion and verification flows.
- Experience with Tessent tools, including: Streaming Scan, Memory BIST (NS), Memory BIST repair, TestKompress, IJTAG, and ScanPro.
- Ability to debug problems quickly and work under pressure.
Education Requirements
Not specified.
About the Company
Company: FSTONE Technologies
FSTONE Technologies is an engineering and technology services company that provides semiconductor design, verification, and testing solutions, including DFT (design-for-test) expertise and support for tools like Tessent.
