DFT Engineer

Job Title

DFT Engineer

Role Summary

Design-for-Test (DFT) engineer responsible for implementing and validating DFT solutions for SoC/ASIC projects. Work includes ATPG pattern generation, MBIST integration, IO test validation, clock DFT verification, and defect debug across pre-silicon and silicon bring-up phases.

Collaborate with RTL designers, verification, backend, and test teams to ensure testability and delivery of production-quality test patterns and diagnostics. Onsite role in Santa Clara, CA.

Experience Level

Mid-level (Mid-Career). Requires 5+ years of hands-on DFT/ATPG experience for SoC or ASIC designs.

Responsibilities

Key responsibilities for this role include:

• Develop and implement DFT structures and scan insertion for SoC/ASIC designs.
• Generate, analyze, and debug ATPG patterns and failing patterns.
• Integrate and validate MBIST and memory test architectures and diagnostics.
• Define and validate IO test methodologies for interface and pin-level testing.
• Perform clock DFT implementation and clocking verification related tasks.
• Run industry-standard DFT/ATPG EDA tool flows and interpret results.
• Investigate test failures, provide diagnostics, and support silicon bring-up.
• Document designs, test flows, and results; communicate with cross-functional teams.

Requirements

Must-have skills and experience:

• 5+ years of hands-on DFT and ATPG experience for SoC or ASIC designs.
• Strong understanding of DFT fundamentals: controllability, observability, and scan-based testing.
• Proven expertise in ATPG pattern generation, analysis, and debug.
• Experience with MBIST, memory test architectures, and diagnostics.
• Knowledge of IO test methodologies for interface and pin-level validation.
• Solid understanding of clock DFT and clock verification concepts.
• Good grasp of digital design and RTL fundamentals.
• Experience using industry-standard DFT/ATPG EDA tools.
• Strong analytical, problem-solving, and communication skills; able to work in fast-paced semiconductor programs.

Nice-to-have: Not specified.

Education Requirements

Bachelor of Engineering (BE) is listed as the qualification.

About the Company

Company: ForwardEdge ASIC

Engineering company focused on ASIC and FPGA design and verification, providing verification strategy, testbench development, and technical leadership for complex high-performance chip designs. Supports projects requiring US government security clearances.