Skip to main content
Amazon logo

DFT Design Engineer, Machine Learning Acceleration

Amazon
September 17, 2026
Full-time
On-site
Austin, Texas, United States
DFT Jobs, Level - Mid-Career

Job Title

DFT Design Engineer, Machine Learning Acceleration

Role Summary

Define and deliver Design for Test (DFT) architectures and flows for AWS machine learning accelerator ASICs at advanced process nodes. Collaborate with block designers, physical design, verification, ATE and system teams to implement test solutions and support silicon bring-up.

Experience Level

Mid-level - typically 5+ years of practical DFT experience with complex SoC designs at advanced technology nodes.

Responsibilities

Execute DFT implementation from architecture through silicon debug and coordinate across design and test teams.

  • Define and implement DFT architectures and insertion strategies for advanced nodes.
  • Develop RTL (Verilog/SystemVerilog) for DFT structures and support verification.
  • Use ATPG, JTAG, MBIST and other DFT tools to generate high-coverage, cost-effective test patterns.
  • Work with block designers and physical design to integrate DFT while addressing timing and area trade-offs.
  • Participate in silicon bring-up, ATE setup, on-system debug, and yield analysis.
  • Develop automation and scripts to support DFT flows and tool usage.
  • Communicate and coordinate requirements across SoC, PD, verification, and test teams.

Requirements

Key technical must-have skills and useful additional qualifications.

Must-have:

  • 5+ years practical DFT experience on complex SoC designs at advanced nodes.
  • Experience with ATPG, JTAG, MBIST and understanding trade-offs between test quality and test time.
  • RTL coding and verification experience using Verilog/SystemVerilog.
  • Experience with industry-standard DFT tools and pattern generation.
  • Experience developing automation scripts to support DFT flows.
  • Experience participating in silicon debug with ATE and system teams.

Nice-to-have:

  • Experience developing STA constraints for DFT modes and working with PD to close timing.
  • Gate-level simulation setup and SDF-based debug experience.
  • Strong scripting/programming skills (Perl, Python, Tcl).
  • Experience with silicon debug and yield optimization.

Education Requirements

Required: Bachelor's degree in Electrical Engineering, Communications Engineering, or a related technical field. Preferred: Master's degree in Electrical or Communications Engineering or a related field. Equivalent practical experience may be considered.


About the Company

Company: Amazon

Headquarters: Seattle, Washington, United States

Amazon is a global leader in e-commerce and cloud computing, committed to delivering fast, reliable services across diverse sectors. The company's innovative technologies include AWS, Kindle, and Echo, as well as developing low Earth orbit satellite networks for improved internet connectivity worldwide.

Amazon logo

Date Posted: 2026-09-17