DFT ASIC Engineer

Job Overview

Siemens EDA, a leader in Electronic Design Automation software, is looking for a DFT ASIC Engineer to join their team in Meudon, FRA. The role involves working on advanced ASIC designs and integrating state-of-the-art silicon architectures.

Role Summary

The DFT ASIC Engineer will be responsible for defining, designing, and integrating DFT architectures such as Scan, ATPG, LBIST, and Memory BIST. The candidate will work collaboratively with ASIC design teams throughout the development process to ensure high-quality testing.

Experience Level

Mid-Career.

Responsibilities

• Define, design, and integrate DFT architectures.
• Generate, validate, and debug test vectors at RTL and gate levels.
• Collaborate with ASIC design teams across the development flow.
• Implement and validate test vectors on ATE for silicon qualification.
• Contribute to fault analysis and yield improvement efforts.
• Innovate in testability methodologies for next-generation SoCs.

Requirements

Applicants should have a degree in electronics or microelectronics with significant experience in DFT for ASIC or SoC. Strong expertise in DFT methods, familiarity with ASIC design flows, and proficiency in programming languages such as Verilog, VHDL, Perl, TCL, and Shell are required. Daily experience in Linux environments is also important. Excellent communication skills in English and French are necessary.

Education Requirements

A degree in Electronics or Microelectronics is mandatory for this position.