Design Verification (Staff to Senior Staff Engineer)

Job Title

Design Verification (Staff to Senior Staff Engineer)

Role Summary

Lead verification engineer on the Custom Silicon Engineering team responsible for functional and performance verification of read-channel storage IP and related SoC blocks for data-center storage products (HDD/SSD). Work closely with architects and designers to close functional issues and deliver production-quality IP.

Experience Level

Senior-level (Staff to Senior Staff). Specific years of experience not specified in the posting.

Responsibilities

Primary responsibilities include leading verification planning, testbench development, and debugging for complex digital/storage IP.

• Develop and execute verification plans for read-channel storage IP designs.
• Create and maintain testbenches using industry-standard verification methodologies.
• Perform functional and performance verification and analyze simulation results.
• Collaborate with design and architecture teams to identify and fix design issues.
• Analyze and debug simulation failures and produce clear verification reports.
• Mentor and guide junior verification engineers.

Requirements

Key technical skills and experience required or strongly preferred.

• Must-have: Proficiency in SystemVerilog and UVM for verification.
• Must-have: Scripting experience (Python, Perl or similar) for automation and flow development.
• Must-have: Strong understanding of ASIC design flow and digital design/verification methodologies.
• Must-have: Experience with industry-standard EDA tools (Cadence, Synopsys, Mentor Graphics, or equivalent).
• Must-have: Strong problem-solving and mathematical skills; ability to analyze complex signal/algorithm behavior.
• Must-have: Experience with Digital Signal Processing and DSP modeling in C/C++.
• Nice-to-have: Prior experience verifying read-channel or storage-related IP and familiarity with high-performance transceivers or analog-mixed blocks.
• Nice-to-have: Proven track record mentoring or leading verification teams.
• Fluent in English with effective written and verbal communication skills.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electronics, Telecommunications Engineering, or a related technical field.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.