Design Verification Lead - Peripheral IP
QualcommJob Title
Design Verification Lead - Peripheral IP
Role Summary
Lead verification for complex wired/wireless peripheral IP and subsystems used in Snapdragon platforms. Own verification strategy, develop UVM-based environments, drive coverage and quality metrics, and lead a small team to achieve first-time-right silicon.
Experience Level
Senior - typically requires 7+ years of hands-on verification experience, with strong UVM and SystemVerilog expertise.
Responsibilities
Drive verification planning and execution, provide technical leadership to a small DV team, and collaborate across design, emulation, and validation groups.
- Define verification strategy, test plans, and coverage goals for peripheral IP and subsystems.
- Architect, develop, and maintain UVM-based constrained-random verification environments.
- Lead day-to-day activities of a small DV team: task planning, code and testplan reviews, mentoring, and technical guidance.
- Debug complex issues across RTL, testbench, and system levels, working with design, emulation, and validation teams.
- Analyze and close functional and code coverage; drive quality metrics to tape-out criteria.
- Contribute to verification methodology and flow improvements across the Peripheral DV team.
Requirements
Must-have technical skills and abilities required to perform the role.
- Extensive hands-on verification experience using UVM and SystemVerilog (typically 7+ years).
- Strong background in digital design and SoC/IP architecture.
- Proven technical leadership or demonstrated ability and motivation to lead a small DV team.
- Deep knowledge of UVM testbench architecture (agents, sequences, scoreboards, coverage).
- Experience with constrained-random, coverage-driven verification and closing coverage gaps.
- Skilled at debugging complex failures in large-scale regressions.
- Scripting proficiency (Python/Perl/Tcl/shell) in a UNIX/Linux environment.
Nice-to-have:
- Experience with high-speed peripherals (USB, PCIe, Display, SerDes or similar I/O IP).
- Knowledge of low-power, reset, and clock-domain interactions at IP/SoC level.
- Familiarity with regression management, metrics, and sign-off criteria.
- Experience working with global, cross-site teams.
Education Requirements
BSc or MSc in Electrical Engineering, Computer Engineering, or a related technical field is preferred. The posting also lists degree/experience equivalencies: Bachelor's + ~4 years, Master's + ~3 years, or PhD + ~2 years of relevant ASIC design/verification/validation experience. Applications with equivalent practical experience will be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
