Design Verification Engineer — Senior to Staff
Join the Marvell Compute and Custom Solutions verification team to develop and execute verification for high-performance SerDes/PHY and digital ASICs. The role focuses on creating testbenches, running functional and performance verification, debugging failures, and collaborating with design and architecture teams.
This position is technical and hands-on, with mentoring responsibilities for junior engineers.
Senior-level (Senior to Staff). Exact years of experience not specified.
Primary responsibilities include planning and executing verification activities and working with cross-functional teams to close design issues.
Must-have technical skills and experience; preferred items noted separately.
BS, MS, or PhD in Electrical Engineering, Computer Engineering, Electronics, Telecommunications Engineering, or a related technical field (degrees stated in the source). Equivalent practical experience not explicitly listed but may be considered.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
