Job Title
Design Verification Engineer (Einfochips)
Role Summary
Works on RTL design verification for ASIC/SoC projects supporting an on-site Arrow client in San Jose, CA. Responsible for planning and executing verification cycles, developing HVL/UVM testbenches, and debugging failures to achieve coverage closure.
Competitive compensation and standard benefits are offered.
Experience Level
Mid-level β the posting specifies 6+ years of relevant experience.
Responsibilities
Key responsibilities include:
- Design and implement verification environments using SystemVerilog/UVM and C/C++ testbenches.
- Create test plans and develop BFM/driver/monitor/scoreboard components; integrate into the testbench.
- Perform stress and corner-case testing, gate-level simulations, and coverage closure.
- Write and maintain assertions and use them for debug and verification quality.
- Debug functional failures and coordinate with the team to reach verification closure.
- Report progress to the customer regularly (daily or weekly) and help ensure customer satisfaction.
Requirements
Must-have and preferred skills:
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Must-have: 6+ years experience with SystemVerilog HVL and C/C++.
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Must-have: 6+ years experience with UVM and SVTB/UVM methodology.
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Must-have: Experience building C++ testbenches and scripting with Make/Perl/Python.
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Must-have: Proven ability to debug using assertions and to drive verification to coverage closure.
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Preferred: Understanding of DSP concepts.
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Preferred: Experience with Subversion and Bugzilla.
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Preferred: Experience with gate-level simulation and protocol verification tools.
- Work arrangement: Fully on-site in San Jose, CA; must be able to travel to client office as requested.
Education Requirements
Not specified.
About the Company
Company: eInfochips
Headquarters: Bengaluru, India
eInfochips is a product engineering and semiconductor design services company offering embedded software, SoC design and verification, testing, and IoT solutions. It operates as part of Arrow Electronics, serving clients across industries worldwide.

Date Posted: 2026-07-10