Design Verification Engineer

Job Title

Design Verification Engineer

Role Summary

Contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. Work on verification planning, environment development, and debug to help deliver first-pass silicon success within the Silicon Chassis team.

Collaborate with architecture, design, and software teams; use AI-assisted workflows as part of daily development.

Experience Level

Mid-level — requires 3+ years of relevant design verification experience.

Responsibilities

Primary responsibilities include verification planning, test development, and cross-team collaboration.

• Develop and execute verification plans and testbenches at IP and subsystem levels.
• Build reusable verification components, checkers, constrained-random tests, and debug infrastructure.
• Analyze simulation failures, perform root-cause analysis, and drive fixes to closure with clear technical communication.
• Contribute to functional coverage planning and coverage closure; support quality signoff under technical lead guidance.
• Work with architecture, design, and software teams on spec reviews, feature clarification, and bug triage.
• Contribute to both simulation and formal verification; improve automation, regression quality, and development efficiency.

Requirements

Must-have technical skills and practical experience.

• Strong programming fundamentals and algorithmic problem-solving.
• Hands-on coding experience in SystemVerilog, C/C++, and Python.
• Experience in simulation-based verification methodologies (UVM/ABV) and testbench development, debugging, and coverage-driven verification.
• Exposure to formal verification concepts and formal tool usage.
• Practical experience using AI-assisted development tools for coding, debugging, and test development.

Nice-to-have:

• Exposure to interconnects and bus protocols (AMBA AXI/ACE/CHI, PCIe, CXL, UCIe).
• Understanding of cache coherency and memory consistency models.
• Experience with external interfaces, system integration debug, emulation or FPGA-based verification.
• Experience with formal verification tools such as JasperGold or VC Formal.
• Familiarity with RTL concepts, physical design, CAD tool flows, or system IPs (MMU/SMMU/IOMMU, interrupt controllers).

Education Requirements

BS or MS in Electrical Engineering, Computer Science, or a related technical field required; the posting specifies a minimum of 3+ years of relevant design verification experience.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.