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Design Verification Engineer

Qorvo
July 31, 2026
Full-time
On-site
Hanoi, Vietnam
Verification Jobs, Level - Mid-Career

Job Title

Design Verification Engineer

Role Summary

Verify digital subsystems of Power Management Units (PMUs), DC-DC converters and SoCs by developing verification plans, testbenches and assertions; work closely with digital and analog design teams through pre- and post-silicon phases.

Team focus: system-level digital verification for PMUs and power-regulation circuits used in consumer, IoT and automotive applications.

Experience Level

Mid-level / Professional β€” typically 2 to 5 years of relevant design verification experience.

Responsibilities

Primary responsibilities include planning, implementation and execution of verification flows and assisting in silicon bring-up.

  • Create and execute verification plans and testbenches for digital blocks and SoC interactions.
  • Develop SystemVerilog Assertions (SVA) for assertions, assumptions and coverage.
  • Develop and integrate Universal Verification Components (UVCs) into UVM environments.
  • Debug failures, diagnose testbench/model/checker issues and close functional and coverage gaps.
  • Write scripts to automate verification flows.
  • Collaborate with analog engineers on chip/system-level verification and post-silicon bring-up and validation.

Requirements

Must-have technical skills and experience; nice-to-have items are listed separately.

  • Must-have: 2–5 years of hands-on experience in design verification for digital blocks.
  • Must-have: Practical experience with HDL (SystemVerilog, Verilog or VHDL).
  • Must-have: Strong understanding of digital hardware concepts (state machines, RAMs, registers, bus protocols such as SPI/I2C) and debugging skills.
  • Must-have: Proficiency in English for verbal and written communication.
  • Nice-to-have: Experience with UVM/UVM-MS and object-oriented verification methodologies.
  • Nice-to-have: Experience with silicon debug involving analog and digital interactions; knowledge of DCDC regulators, LDOs, bandgaps and references.
  • Nice-to-have: Familiarity with behavioral modeling (VAMS wreal, SV-RNM, SV EENET, SV-UDN).
  • Nice-to-have: Linux shell experience and scripting (csh/tcl/perl/python) to support automation.
  • Self-driven, proactive, with strong analytical and problem-solving skills.

Education Requirements

Bachelor's or graduate degree in Computer Science, Electrical Engineering, Computer Engineering or a closely related technical field.


About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.

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Date Posted: 2026-07-31