Design Verification Engineer

Job Title

Design Verification Engineer

Role Summary

The Design Verification Engineer role focuses on building next-generation automotive connectivity solutions, particularly in the Ultra-Wideband (UWB) domain, as part of a larger team at Texas Instruments. It involves driving innovation in low-power Bluetooth Low Energy (BLE) solutions and engaging in cutting-edge IP development for real-world automotive applications.

Experience Level

Mid-level (2–5 years experience)

Responsibilities

The primary responsibilities include:

• Developing and executing test plans for Design Verification.
• Building DV environments from scratch using hardware description languages such as Verilog, SystemVerilog, and VHDL.
• Creating and executing block functional models (BFM).
• Understanding and applying constrained random verification techniques.
• Conducting formal verification methodologies and solidifying fundamentals of CDC/RDC.

Requirements

Must-have qualifications include:

• Strong understanding of hardware description languages (Verilog/SystemVerilog/VHDL).
• Hands-on experience with UVM.
• Experience in test plan creation and execution.
• Understanding of constrained random verification techniques.
• Knowledge of formal verification methodologies.

Nice-to-have qualifications include:

• Experience in CPF/UPF low-power verification.
• Knowledge of AHB/APB bus protocols.

Education Requirements

Bachelor's Degree in a relevant field.

About the Company

Company: Texas Instruments

Headquarters: Dallas, Texas, USA

Texas Instruments is a global semiconductor company that designs, manufactures, and sells analog and embedded processing chips for various markets including industrial, automotive, and personal electronics. The company's innovations aim to make electronics more affordable and reliable, fostering advancements in technology through each generation of semiconductors.