Design Technology Tool Enablement Engineer

Job Title

Design Technology Tool Enablement Engineer

Role Summary

The engineer will design, develop, test, and debug EDA software tools, flows, and automation that enable design teams to meet manufacturability and process-technology requirements. Work sits at the intersection of software development and semiconductor process/design enablement within the Design Technology Platform team.

Primary responsibilities include tool and flow automation, test construction and validation, coordinating with process owners and EDA vendors, and improving deployments across teams.

Experience Level

Senior. Typical background includes multi-year professional experience in scripting and EDA tool enablement (see Requirements for specific years), plus experience with semiconductor process, device physics, or physical design challenges.

Responsibilities

Key responsibilities for this role include:

• Design, develop, and debug software tools and methodologies for process design and manufacturing enablement.
• Collaborate with process developers, design rule owners, and end users to define specifications and implement solutions.
• Automate workflows to improve efficiency, accuracy, and reproducible deployment across teams.
• Build and execute test cases to validate tools and ensure integration with design methodologies.
• Engage with internal partners and external EDA vendors to coordinate feature requirements and specifications.
• Analyze and isolate performance contributors for technology features during enablement.
• Identify problems, propose plans and solutions, and drive implementation across disciplines.
• Operate effectively in dynamic and sometimes ambiguous environments; coach and reinforce team norms and values.

Requirements

Must-have skills and experience:

• 3+ years scripting experience (Python, Tcl, Perl) for automation or testing on Unix/Linux platforms.
• 3+ years working with EDA tools such as Calibre, ICV, or Pegasus, including developing rule decks (e.g., SVRF/TVF, PXL, PVL).
• 5+ years experience addressing semiconductor device physics, process technology, and translating physical design challenges into algorithmic/software solutions.
• Experience building and executing validation tests and automating deployment of tool flows.
• Strong analytical and problem-solving skills, attention to detail, and ability to connect cross-discipline requirements into practical solutions.
• Effective written and verbal communication skills; ability to influence and collaborate across teams and with external vendors.

Nice-to-have:

• Familiarity with physical verification techniques (DRC, LVS, density/fill).
• Exposure to layout and schematic entry tools such as Cadence Virtuoso or Synopsys Custom Designer.
• Proven leadership in driving process improvements or innovation initiatives.

Education Requirements

Master's degree in Electrical Engineering, Computer Engineering, or a related STEM field with 8+ years of relevant experience, OR Ph.D. in Electrical Engineering, Computer Engineering, or a related STEM field with 5+ years of relevant experience. (Degrees and required years are specified as minimum qualifications in the source posting.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.