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Design Technology Engineer

Qualcomm
October 26, 2026
Full-time
On-site
Tijuana, Baja California, Mexico
EDA Jobs, Level - Mid-Career

Job Title

Design Technology Engineer

Role Summary

Work on development and enablement of design methods, flows, and technologies that move complex SoCs from advanced process nodes to production. The role partners with design, CAD, foundry, and test teams to optimize power, performance, area, timing, thermal behavior, yield, and silicon reliability.

Experience Level

Mid-level - typically candidates with practical ASIC/SoC experience. Common profiles: 2+ years of ASIC design/verification/integration experience (typical for those with a Bachelor's) or 1+ year for those with a Master's; PhD holders also considered.

Responsibilities

Key responsibilities include developing and improving design technologies, collaborating across teams, and supporting signoff and silicon bring-up.

  • Develop and maintain design flows and methodologies for digital and custom design lifecycles.
  • Collaborate with RTL designers, CAD, foundry, and test teams to meet PPA (power, performance, area) and timing goals.
  • Implement and validate timing and power signoff flows, PDN and physical verification processes.
  • Support low-power design techniques and physical design tasks including floorplanning, place-and-route, and closure activities.
  • Contribute to technology enablement, design automation, and tool integrations with commercial EDA tools.
  • Perform post-silicon analysis, debug, and validation as required.
  • Develop automation and tooling (including scripting and ML/automation where applicable) to accelerate design productivity.
  • Work on creation and automation of library cells, macros, and IP blocks where applicable.

Requirements

Must-have technical skills and experience for successful performance in the role.

  • Practical experience in ASIC design, verification, validation, or integration.
  • Familiarity with physical design concepts: floorplanning, placement, routing, and timing closure.
  • Experience with timing and power signoff methodologies and physical verification flows.
  • Proficiency with common EDA tool flows and scripting for automation (Python, TCL, or similar).
  • Ability to collaborate across multi-disciplinary teams (design, CAD, foundry, test).
  • Strong debugging and problem-solving skills, including post-silicon analysis when needed.
  • Clear written and verbal communication skills in an engineering environment.

Education Requirements

Minimum qualifications: Bachelor's degree in Science, Engineering, or related field with 2+ years of ASIC design/verification/validation/integration experience; OR Master's degree in Science, Engineering, or related field with 1+ year of such experience; OR PhD in Science, Engineering, or related field.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-10-26