Design Infrastructure Engineer — Standard and Custom Cell Characterization (HBM)
Micron TechnologyJob Title
Design Infrastructure Engineer — Standard and Custom Cell Characterization (HBM)
Role Summary
The Heterogeneous Integration Group (HIG) in Micron's Technology and Products Group develops High Bandwidth Memory (HBM) solutions. This role builds and scales characterization infrastructure and generated IP used by multiple HBM memory and logic designs.
You will work across circuit design, EDA infrastructure, and silicon validation readiness to deliver robust, automated characterization flows that improve timing closure, power modeling, and product quality for next-generation HBM programs.
Experience Level
Mid-level. No explicit years of experience listed; role expects demonstrated hands-on experience with cell characterization and EDA infrastructure.
Responsibilities
Primary responsibilities focus on building scalable characterization flows, integrating them with design ecosystems, and improving model quality and silicon correlation.
- Develop and maintain infrastructure for standard and custom cell characterization: timing, power, noise, and signal-integrity modeling.
- Build reusable, automated MCMM flows and enable Liberty model generation, validation, and regression frameworks.
- Drive characterization across multiple process technologies and foundries, addressing variability, layout effects, aging, and reliability.
- Support characterization for diverse HBM product verticals and collaborate with design teams on requirements for TSV interfaces, PHY-critical paths, and high-speed datapaths.
- Integrate characterization flows with design, verification, and CAD ecosystems to improve model accuracy and turnaround time.
- Lead debug and validation by root-causing mismatches among SPICE, extracted views, STA, and silicon; develop metrics, dashboards, and automated checks.
Requirements
Must-have technical skills and tools required for immediate contribution.
- Hands-on experience with standard or custom cell characterization flows, including Liberty modeling (CCS/ECSM or equivalent) and SPICE-based simulation.
- Solid understanding of STA flows and timing libraries.
- Proficiency in scripting for automation (Python, Perl, or Tcl).
- Experience with SiliconSmart or PrimeLib is required.
- Ability to develop scalable, reusable infrastructure and to collaborate across design, verification, and CAD teams.
- Preferred: experience across multiple process technologies, HBM/DRAM or high-speed interface design, and familiarity with TSV-aware and PHY design considerations.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering or a related field is stated as required; emphasis on fundamentals in CMOS digital and mixed-signal design, device physics, and PVT variation.
About the Company
Company: Micron Technology
Headquarters: Boise, Idaho, USA
Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.
