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Design Engineer II

Silicon Labs
November 5, 2026
Full-time
Remote friendly (Austin, Texas, United States)
Worldwide
$101,500 - $188,500 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

Design Engineer II

Role Summary

As a Digital Design Engineer II you will design and deliver highly integrated, low-power SoCs for IoT wireless applications. You will work on digital architecture, RTL design, synthesis, timing and power optimization, verification, and silicon bring-up within cross-functional SoC teams.

Experience Level

Mid-level - typically 3–5 years of professional experience in digital CMOS IC design.

Responsibilities

Primary responsibilities include architecture, RTL design, verification, and collaboration for SoC development:

  • Develop complex SoC architectures with multiple processors, digital and mixed-signal subsystems, and multiple power and clock domains.
  • Write and maintain RTL (SystemVerilog/Verilog) and participate in architecture, design, and verification reviews.
  • Perform logic synthesis, full-chip timing and power analysis; optimize designs for target customer scenarios.
  • Integrate digital and mixed-signal IPs (processors, memory, controllers, buses, power/clocking, security, ML, radio, analog).
  • Collaborate with backend teams to optimize power, performance, and area.
  • Perform pre-silicon verification using block and chip-level testbenches and RTL/gate-level simulation.
  • Support silicon validation and bring-up and provide cross-functional assistance to teams.

Requirements

Must-have technical skills and demonstrated experience:

  • 3–5 years professional experience in digital CMOS IC design.
  • Proven Verilog/SystemVerilog RTL design experience and history of taking designs through the silicon development lifecycle to production.
  • Knowledge of embedded processor systems and C programming.
  • Experience with RTL and gate-level simulation, waveform/debug tools, and power analysis tools.
  • Experience with logic synthesis and timing constraints.
  • Experience working with analog and mixed-signal designs to support integration and verification in SoC.
  • Scripting and automation experience (Python, Perl, Tcl).
  • Experience with revision control/configuration management systems (Perforce, Git, Methodics).
  • Strong written and verbal communication and a self-driven work style.
  • Experience with AI-powered tools to enhance productivity and analysis. (Nice-to-have)

Education Requirements

Master's degree in Electrical Engineering (stated as a minimum qualification).


About the Company

Company: Silicon Labs

Headquarters: Austin, Texas, USA

Silicon Labs is a leading innovator in low-power wireless connectivity, creating embedded technology that connects devices to improve lives. With a focus on advanced edge connectivity applications, the company provides device makers with cutting-edge solutions and support. Headquartered in Austin, Texas, Silicon Labs operates in over 16 countries, serving markets such as smart home, industrial IoT, and smart cities.

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Date Posted: 2026-11-04