Design Engineer II
Cadence Design SystemsRole Summary
The Design Engineer II at Cadence will focus on the development and maintenance of EDA flows for physical implementation. The role involves collaborating with teams to optimize PPA for IPs and Soft Controllers in advanced semiconductor processes.
Experience Level
Mid-level, requiring a minimum of 2 years of experience in ASIC design environments.
Responsibilities
The key responsibilities include:
- Developing and automating EDA flows and scripts.
- PPA characterization and optimization of flow.
- Managing regression infrastructure for the quality of RTL/flow development.
- Implementing digital designs using Cadence EDA tools.
- Utilizing Python and Tcl for scripting tasks.
Requirements
Must-have skills and qualifications include:
- A degree in Electronics (MS/MTech/BE/BTech) from reputed institutes.
- Physical design experience in ASIC environments.
- Knowledge of ASIC Design Flow, including synthesis, physical design, and verification.
- Strong leadership, communication, analytical, and problem-solving skills.
- Self-motivation and teamwork capabilities.
Education Requirements
Master's or Bachelor's degree in Electronics is required.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
