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Design Engineer I

Cadence Design Systems
August 22, 2026
Full-time
On-site
Hyderabad, Telangana, India
Test Engineering Jobs, Level - Entry or Early Career

Job Title

Design Engineer I

Role Summary

Perform pre- and post-silicon functional validation of SoCs and CPUs, focusing on IP integration, CPU internals, system-level features, and silicon readiness. Work on validation methodologies, test plans, infrastructure, and cross-functional debug to meet performance, power, and functional requirements.

Experience Level

Entry-level / Early career β€” 1–4 years of relevant experience in SoC/CPU validation and silicon bring-up.

Responsibilities

Primary responsibilities include validation planning, execution, and debug across pre- and post-silicon environments.

  • Define, develop, and execute functional validation for SoCs and CPUs, including IP integration and system-level scenarios.
  • Create validation methodologies, write test plans, and develop test content (firmware, microcode, custom OS builds).
  • Develop and maintain postsilicon validation infrastructure: performance monitors, behavioral checkers, coverage metrics, and test environments.
  • Perform silicon debug and failure analysis; identify root causes and drive fixes across design and validation teams.
  • Use simulation, emulation, FPGA platforms, and in-circuit emulators for validation and bug hunts.
  • Collaborate with architecture, design, verification, board, platform, and manufacturing teams to improve validation and debug processes.
  • Publish validation reports summarizing activities, results, and outstanding issues.

Requirements

Must-have technical skills and experience for the role.

  • Experience programming in C/C++ and Python; familiarity with Assembly for content development and scripting.
  • Knowledge of CPU architectures such as RISC-V, x86, and ARM.
  • Familiarity with common on-chip interfaces and subsystems: PCIe, UART, I2C, SPI, USB, Ethernet, NoC, and DDR memory.
  • Experience with pre-silicon systems (PSS), FPGAs, and in-circuit emulation platforms.
  • Hands-on experience with post-silicon and debug tools (JTAG/ITP, logic analyzers, oscilloscopes).
  • Ability to use hardware and software tools to meet validation coverage, power, and performance goals.
  • Strong troubleshooting, documentation, and verbal/written communication skills; ability to work in cross-functional teams.
  • Nice-to-have: familiarity with pre-silicon design/validation flows, OS concepts, power-on bring-up techniques, and power/performance analysis.

Education Requirements

Degree in Electronics/Communications or related technical engineering field: BE/B.Tech or ME/M.Tech; Diploma in Electronics & Communications also referenced. (The posting specifies these academic credentials; equivalent practical experience is not explicitly stated.)


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-08-22