Design Engineer

Role Summary

The Design Engineer will be responsible for unit level design and IP integration, ensuring design quality checks and exposure to various EDA tools and methodologies. The focus is on realizing high-quality design through collaboration and innovation.

Experience Level

Mid-level (specific years of experience not mentioned).

Responsibilities

The responsibilities include:

• Own unit level design and IP integration.
• Conduct design quality checks with EDA tools.
• Define design timing constraints and achieve timing convergence.
• Plan openbox tests, write assertion checks, and debug.
• Perform design code coverage analysis and closure.
• Scripting for flow automation in daily design tasks.

Requirements

Essential skills and qualifications include:

• Good understanding of ASIC/FPGA IP or SoC development cycles.
• Proficiency in RTL design with Verilog or System Verilog.
• Familiarity with design quality check methodologies (e.g., Lint, CDC).
• Programming skills in Perl, Shell Scripting, TCL, or Python.
• Experience with Linux OS.
• Self-motivated with strong communication skills.

Education Requirements

Not specified.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.