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Design Engineer – AI SoC Development

Intel Corporation
July 01, 2026
Full-time
Remote friendly (Folsom, California, United States)
United States
$164,470 - $232,190 USD yearly
RTL Design Jobs, Level - Mid-Career

Job Title

Design Engineer – AI SoC Development

Role Summary

As an RTL Design Engineer on Intel's AI SoC team, you will develop and integrate RTL for SoC and discrete component designs, collaborate with verification and physical design teams, and support silicon bring-up and validation. The role focuses on microarchitecture through implementation to ensure power, performance, area, and timing goals are met.

This position requires close coordination with IP providers and cross-functional teams to deliver synthesis- and timing-clean designs and to resolve post-silicon issues.

Experience Level

Mid-level — typically 4+ years of relevant industry experience in ASIC/SoC RTL design and implementation.

Responsibilities

Primary responsibilities include implementing RTL, integrating IP, driving timing/power convergence, and supporting validation and bring-up.

  • Implement RTL in Verilog/SystemVerilog from micro-architecture specifications.
  • Integrate IP blocks at top level and ensure synthesis- and timing-clean design.
  • Develop timing constraints and assist physical design teams with synthesis and timing closure.
  • Collaborate with verification teams to address failing RTL tests and achieve coverage.
  • Support silicon bring-up, post-silicon validation, debug, and performance analysis.
  • Apply power, performance, area, and timing optimization techniques during RTL development.
  • Work with IP providers to integrate and validate IPs at the SoC level.
  • Follow secure development practices and contribute to quality assurance and design methodology improvements.

Requirements

Must-have:

  • 4+ years of experience in RTL design and implementation for ASIC/SoC development.
  • Proficiency in Verilog and SystemVerilog for RTL coding and design.
  • Experience with synthesis tools and timing-closure methodologies.

Nice-to-have:

  • Understanding of clock domain crossings, power optimization, and timing-closure techniques.
  • Experience with SoC system integration and CPU subsystem design.
  • Familiarity with standard bus protocols (AXI, AHB) and embedded processor architectures.
  • Experience with static timing analysis (STA), formal verification tools, HDL simulators (VCS, Questa, IES), lint tools (Spyglass), and FPGA prototyping.
  • Basic scripting skills (Python, TCL) for automation.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science required.


About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.

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Date Posted: 2026-06-30