Design Engineer 5
Lattice SemiconductorJob Title
Design Engineer 5
Role Summary
Senior design engineering role at Lattice Semiconductor focused on digital logic and IP development for ASIC/FPGA products. The role works with cross-functional teams to implement, verify, and deliver production-quality silicon or FPGA designs.
Experience Level
Senior-level. Specific years of experience not specified in the source.
Responsibilities
Primary responsibilities include:
- Lead RTL design and implementation for digital blocks or IP.
- Develop and execute verification plans, including directed tests and coverage-driven verification.
- Perform synthesis, timing closure, and floorplanning collaboration with physical design teams.
- Debug post-silicon issues and collaborate on silicon bring-up and validation.
- Produce and maintain design documentation, specifications, and release artifacts.
- Mentor junior engineers and coordinate with cross-functional teams (verification, validation, software, systems).
Requirements
Key qualifications and skills (extracted or summarized from the posting where available):
- Must-have: Practical experience with digital design (RTL), experience with HDL such as Verilog or VHDL, familiarity with synthesis and timing analysis, and experience using EDA and FPGA toolchains.
- Must-have: Experience debugging complex hardware issues and working in cross-functional development teams.
- Nice-to-have: Experience with verification methodologies (for example UVM), scripting for automation (Python, Perl, TCL), or prior ASIC/FPGA product delivery experience.
Education Requirements
Not specified.
About the Company
Company: Lattice Semiconductor
Headquarters: Portland, Oregon, USA
Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.
