Design Engineer 4

Job Title

Design Engineer 4

Role Summary

This role is a Silicon Design Validation engineering position based in Pune responsible for validation and characterization of FPGA IP and silicon from bring-up through production release.

The engineer will work across design, verification, manufacturing, test and applications teams to verify IP functionality and performance and to produce validated datasheet parameters.

Experience Level

Senior — requires 8+ years of relevant experience.

Responsibilities

Primary responsibilities include validation planning, test development, silicon bring-up, data analysis and cross-functional coordination.

• Validate and characterize FPGA IP and silicon from silicon arrival through production release.
• Develop validation and characterization plans, bench hardware setups and software tools.
• Implement test logic in RTL (Verilog/VHDL) and use FPGA prototypes/emulation for validation.
• Drive silicon bring-up, debug failures, and verify protocol compliance (PCIe, Ethernet, JESD204, MIPI, USB, DisplayPort/HDMI, etc.).
• Design and evaluate high-speed board layouts and perform signal integrity analysis and debugging.
• Automate tests using Python/Perl and analyze measured data statistically to produce datasheet parameters.
• Use bench instruments (BERT, VNA, oscilloscopes, protocol exercisers/analyzers) for device characterization.
• Coordinate with design, verification, manufacturing, test, quality and applications teams; support customer issues post-release.

Requirements

Must-have skills and experience for this role.

• 8+ years of experience in silicon validation, characterization, or FPGA/system validation.
• Experience leading small technical teams as a tech lead.
• Expertise in high-speed SerDes characterization and protocol compliance testing (PCIe, Ethernet, SDI, CoaXpress, JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB, DisplayPort/HDMI).
• Expertise in high-speed board design and signal integrity evaluation/debugging.
• Proficiency in Verilog and VHDL and experience with FPGA development tools to implement test RTL.
• Experience developing test automation using Python or Perl.
• Familiarity with statistical analysis tools and concepts for datasheet parameter extraction (e.g., JMP, R).
• Hands-on experience with characterization equipment (BERT, VNA, oscilloscopes, protocol analyzers).
• Strong problem solving, debugging, written and verbal communication skills; self-motivated and proactive.

Education Requirements

Bachelor's degree in Electrical Engineering (explicitly stated in the source). No other degrees, fields of study or certifications were specified.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.