DDR STA/Timing Engineer (Staff/Senior Staff)
QualcommJob Title
DDR STA/Timing Engineer (Staff/Senior Staff)
Role Summary
Perform static timing analysis (STA) and timing signoff for multi-mode, multi-voltage-domain SoC and hard-macro designs. Work on timing closure, methodology development and automation, and correlate STA with circuit simulation and silicon results.
Embedded in the Hardware Engineering group; collaborate with implementation, physical design, and verification teams to meet timing and performance targets.
Experience Level
Senior-level. Preferred 7–13 years of STA/timing experience; the posting also includes options for candidates with lower experience depending on degree level.
Responsibilities
Key responsibilities include STA setup, timing signoff, methodology development, and automation.
- Set up STA flows, run convergence, perform reviews and signoff for multi-mode, multi-voltage-domain designs.
- Perform timing analysis, validation and debug across PVT corners using PrimeTime/Tempus.
- Run PrimeTime and/or Tempus for flow optimization and correlate SPICE to STA results.
- Develop and maintain automation and scripts (TCL/Perl/Python) within STA/PD tools.
- Evaluate timing methodologies and tools across designs and technology nodes.
- Collaborate with RTL-to-GDS implementation and process technology teams for timing and correlation tasks.
Requirements
Must-have technical skills and competencies, plus preferred expertise.
- Must-have: Strong STA timing analysis experience and practical use of PrimeTime or Tempus.
- Experience with STA flow optimization, timing constraints, CTS, multi-cycle/0-cycle paths, and latch transparency handling.
- Proficiency in scripting for automation (TCL, Perl, Python; Awk useful).
- Familiarity with digital implementation and back-end flows (e.g., ICC/Innovus) and RTL-to-GDS interactions.
- Experience correlating SPICE/circuit simulations (HSPICE/FineSim) with STA and handling Monte Carlo analysis.
- Good technical writing and cross-functional communication skills.
- Nice-to-have / Preferred: Deep knowledge of crosstalk, signal integrity, layout parasitic extraction, feed-through handling, and experience driving chip-level and hard-macro timing convergence.
Education Requirements
Degrees accepted: Bachelor's, Master’s, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related fields. The posting lists: B.Tech / MTech / MS in Electrical, Electronics, Microelectronics, VLSI, or related fields. Minimum experience guidance varies by degree (e.g., Bachelor's +2 years, Master’s +1 year, or PhD).
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
