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DDR PHY Staff / Sr. Staff Design Verification Engineer

Qualcomm
September 30, 2026
Full-time
On-site
Bengaluru, Karnataka, India
Verification Jobs, Level - Senior

Job Title

DDR PHY Staff / Sr. Staff Design Verification Engineer

Role Summary

Responsible for design verification of DDR PHY IPs for next-generation SoCs. Work within the hardware engineering verification team to develop and maintain DV testbenches, create test plans, execute regressions, debug failures across IP, subsystem, and post-silicon stages, and provide quality sign-off.

Experience Level

Senior-level. The posting expects extensive design verification experience (listed as about 12–15 years). See the Education Requirements section for degree-linked minimum experience floors.

Responsibilities

Key responsibilities include ownership of verification infrastructure, test development, debugging, and cross-team collaboration.

  • Own DV testbench and associated collateral: checkers, scoreboards, assertions, and functional coverage.
  • Develop test plans and test cases to cover the design feature set and drive coverage closure.
  • Collaborate with Design, Subsystem/SoC, and SVE teams on failure debug and resolution.
  • Analyze regression signatures, identify root causes, and track bug fixes.
  • Perform quality sign-off and produce required verification documentation.
  • Debug SS/SOC and post-silicon issues in coordination with design teams.
  • Verify at IP and sub-system levels and support integration activities.

Requirements

Must-have technical skills and experience; preferred items noted.

  • Proven experience in design verification and computational logic verification for complex IPs.
  • Strong knowledge of DDR PHY architecture, DFI protocol, and JEDEC standards for current generations.
  • Expertise in Verilog/SystemVerilog and UVM/OVM methodologies.
  • Experience with functional verification, coverage-driven verification, gate-level simulation (GLS), low-power verification, and formal verification.
  • Experience developing monitors, scoreboards, and sequencers for complex scenario generation and DUT verification.
  • Strong debugging, analytical, and problem-solving skills.
  • Nice-to-have: scripting (Perl/Tcl), familiarity with AHB/AXI bus protocols, and post-silicon bring-up / HW–SW debug experience.

Education Requirements

Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field are listed. The posting specifies degree-linked minimum experience: Bachelor's +6 years, Master's +5 years, or PhD +4 years of hardware engineering or related work experience (equivalent related experience is allowed as described).


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-30