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DDR/LPDDR IP Design Staff Engineer

Synopsys
September 25, 2026
Full-time
On-site
Wuhan, Hubei, China
Semiconductor IP Jobs, Level - Senior

Job Title

DDR/LPDDR IP Design Staff Engineer

Role Summary

Senior engineer on the DDR/LPDDR design and verification team responsible for digital IP development, simulation and silicon debug, and delivering production-ready DDR/LPDDR IP for current and next-generation technologies.

Work closely with digital and mixed-signal engineers and customer support/application engineering teams to resolve issues and ensure IP quality and integration readiness.

Experience Level

Senior - role expects an experienced engineer (see Education Requirements for specified years of experience).

Responsibilities

The main responsibilities include:

  • Design and implement digital logic per predefined RTL coding styles using Verilog/SystemVerilog.
  • Identify and resolve RTL issues and clean violations reported by lint, CDC, DFT, and synthesis flows.
  • Perform simulation-based verification and silicon debug; root-cause analysis of functional and timing issues.
  • Use EDA flows and tools to verify and deliver IP, and ensure integration readiness for customers.
  • Collaborate with other design groups, mixed-signal engineers, and application engineers to support customers and resolve integration issues.
  • Contribute to next-generation IP development and improve verification/debug methodologies.

Requirements

Must-have technical skills and attributes:

  • Proven digital design and verification experience with Verilog and SystemVerilog.
  • Strong simulation and silicon debug skills; ability to perform root-cause analysis.
  • Familiarity with Synopsys EDA tools such as VCS, Verdi, SpyGlass, Design Compiler (DC), and Formality.
  • Experience addressing lint, CDC, DFT, and synthesis issues in delivered RTL.
  • Good communication skills for cross-team and customer interactions.

Nice-to-have:

  • Knowledge of interface technologies such as DDR, HBM, UCIe.
  • Scripting experience (Shell, Perl, Python, TCL).
  • Background in analog circuits or mixed-signal concepts.
  • Strong analytical/problem-solving mindset and willingness to learn new technologies.

Education Requirements

Bachelor of Science in Electrical Engineering (BSEE) with 6+ years of digital design experience, or Master of Science in Electrical Engineering (MSEE) with 3+ years of relevant experience, as specified in the posting.


About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.

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Date Posted: 2026-09-22