Customer Engagement Architect

Job Title

Customer Engagement Architect

Role Summary

Member of the HSV Engagement/Support team providing technical support for Palladium, Protium and Virtual Protocol (PDAPP) products. Work directly with customers, field account engineers, and R&D to diagnose issues, test fixes, and improve compiler and verification flows.

Primary mission: resolve customer escalations, reproduce and debug failures, validate R&D fixes, and transfer knowledge to customers and field teams.

Experience Level

Senior role - expects 8+ years of relevant experience (engineering, verification, or applications/technical support).

Responsibilities

Accountable for technical customer engagement, issue resolution, and product validation.

• Work with customers on performance tuning and deploying advanced compiler features.
• Collaborate with R&D to refine compiler features and spec enhancement requests.
• Handle field- and customer-reported issues; reproduce failures and produce test cases.
• Manage critical account escalations and coordinate with R&D managers to resolve CID cases.
• Test and validate R&D fixes/patches and participate in internal beta activities.
• Develop hardware and firmware expertise; support field service for hw/fw issues.
• Update and maintain product training materials; train customers on advanced features.

Requirements

Technical skills and experience required to perform the role.

• Strong knowledge of design debug techniques and digital logic design.
• Strong understanding of verification methodologies for complex EDA environments.
• Proficient in HDLs: Verilog, SystemVerilog, and VHDL; able to create test cases to reproduce issues quickly.
• Proficient with Unix/Linux scripting (ksh/bash/csh/perl).
• Experience with SystemVerilog assertions/coverage and low-power flows (CPF/UPF); UVM experience is a plus.
• Experience with emulation; familiarity with Cadence Palladium/Protium preferred.
• Excellent written and verbal communication; able to explain complex technical problems clearly to customers and internal teams.
• Willingness to travel occasionally for critical issue resolution (up to ~10% annually).

Education Requirements

Requires a Master of Science in Electrical Engineering or Computer Engineering (MS-EE/MS-CE). The posting specifies 8+ years of experience in design/verification of complex digital designs or equivalent experience in applications engineering/technical support.

About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.