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CPU Server Floorplan and Integration Engineer

Qualcomm
August 31, 2026
Full-time
On-site
Santa Clara, California, United States
$142,200 - $213,400 USD yearly
Physical Design Jobs, Level - Mid-Career

Job Title

CPU Server Floorplan and Integration Engineer

Role Summary

Work on CPU floorplanning, block and chip integration, and physical design for high-performance server CPUs in a data center product group. Collaborate with microarchitecture, RTL, and physical-design teams to meet power, area and timing goals.

Experience Level

Mid-level (typical background: several years of physical design or SoC integration experience; Qualcomm lists candidates with 2+ years and up).

Responsibilities

Primary responsibilities include floorplan and integration tasks across block and full-chip scope, verification for electrical robustness, and coordination with internal and external teams.

  • Perform CPU physical design tasks: floorplanning, bump/RDL planning, IP integration, power/ground generation, and pin assignment.
  • Lead full-chip floorplan, area optimizations, block partitioning, and pin assignment work.
  • Manage chip-level place-and-route and finalize CPU database for construction and verification.
  • Validate designs for functional and electrical robustness, including signoff checks.
  • Coordinate custom layout integration and collaborate with external IP teams to meet technical and delivery requirements.
  • Develop and maintain workflows for chip integration and analysis.

Requirements

Core technical skills and practical experience required; preferred items listed separately.

Must-have:
  • Proficiency with synthesis, place-and-route flows, and signoff timing and power analysis.
  • Experience with block-level implementation and full-chip floorplanning and power-grid planning.
  • Hands-on physical-design, integration, and verification experience on large processor or SoC designs.
  • Knowledge of low-power and high-performance design methodologies.
  • Strong understanding of circuit and layout design principles.
  • Familiarity with extraction, static timing analysis (STA), and EM/IR (electromigration and IR drop) flows.
  • Ability to work effectively in cross-functional teams and coordinate across groups.
Nice-to-have:
  • Experience in deep-submicron process nodes.
  • Experience as a technical lead driving physical-design database development and delivery.
  • Familiarity with industry-standard tools for synthesis, place & route, and tapeout flows.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with typically 2+ years' relevant experience; or a Master’s in those fields with 1+ year; or a PhD in a related field. Related work experience may be accepted in lieu of degree where noted in qualifications.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-08-31