CPU Senior Timing Engineer

Job Title

CPU Senior Timing Engineer

Role Summary

As a Senior Timing Engineer on Intel's CPU design team in Bangalore, you will lead top-level timing analysis and closure for high-performance CPU IP. You will collaborate with RTL, physical design, clocking, and integration teams to ensure designs meet frequency, power, and signoff targets across required modes and corners.

Experience Level

Senior - the role targets experienced engineers; see Education Requirements for the specific years-of-experience guidance tied to degree level.

Responsibilities

The role focuses on timing predictability, closure, risk tracking, and automation to support successful tapeout.

• Lead top-level timing analysis and closure across implementation and signoff stages.
• Create, review, and maintain timing constraints, MMMC scenarios, path budgets, and timing exceptions for top-level integration.
• Analyze and resolve setup, hold, clock gating, crosstalk, noise, and cross-block timing issues affecting CPU performance.
• Collaborate with RTL, block owners, physical design, and clock teams to close critical paths and improve timing convergence.
• Ensure correlation between block-level, top-level, and signoff timing environments and track timing risks against project milestones.
• Develop scripts and methodology improvements to automate timing analysis, reporting, and closure efficiency.

Requirements

Must-have technical skills and experience.

• Strong knowledge of static timing analysis, MMMC flows, timing constraints, OCV/derates, crosstalk, and timing exceptions.
• Hands-on experience with STA tools such as PrimeTime or Tempus.
• Familiarity with implementation/place-and-route tools such as ICC2 or Innovus.
• Proficiency in Tcl and at least one scripting language (Python, Perl, or shell).
• Strong debugging, problem-solving, and cross-functional communication skills.

Nice-to-have:

• Experience automating physical-design workflows and timing analyses.
• Experience working in distributed, cross-geography engineering teams.

Education Requirements

Bachelor's degree in Electrical Engineering, Electronics Engineering, or a related field with 4+ years of hands-on experience, OR Master's degree in a relevant field with 3+ years of hands-on experience. Strong exposure to CPU or high-performance IP timing closure is expected.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.