CPU Physical Design Senior Engineer
QualcommJob Title
CPU Physical Design Senior Engineer
Role Summary
Lead block- and chip-level physical implementation, timing signoff, and power-delivery activities for high-speed CPU cores. Work with RTL designers, STA and PDN engineers to deliver GDSII-ready layouts that meet performance, power, area (PPA) and signoff targets.
Position sits in the Hardware/ASIC physical-design group in Bangalore and collaborates with cross-functional teams to resolve design, verification, and signoff issues.
Experience Level
Senior-level. Responsible for leading physical-design and signoff efforts. Role guidance in the posting ranges from role-specific experience (2+ years) up to 7+ years for IC design leadership-see Education Requirements for degree-linked minimums.
Responsibilities
Primary responsibilities include implementation, signoff, and delivery of CPU physical design blocks and chip integrations.
- Lead block- and chip-level physical design, STA, and PDN activities.
- Perform timing signoff and timing closure for high-speed cores.
- Drive RTL-to-GDSII implementation and design convergence to meet PPA targets.
- Develop and validate PDN methodology and ensure power integrity.
- Apply low-power techniques (power gating, multi-Vt, power supply management).
- Analyze circuit-level critical paths and address deep sub-micron issues (leakage, signal integrity, DFM).
- Collaborate with cross-functional teams to resolve constraints, verification, and signoff issues.
- Mentor and coordinate a small team to deliver technical milestones.
Requirements
Must-have technical skills and experience; degree requirements are summarized under Education Requirements below.
- Proven experience in physical design and timing signoff for high-speed CPU cores.
- Experience leading STA and PDN activities at block or chip level.
- Hands-on knowledge of RTL-to-GDSII flows and design convergence for PPA targets.
- Familiarity with low-power flows and power-management techniques.
- Understanding of deep sub-micron design challenges: leakage, signal integrity, DFM.
- Proficient scripting skills in Tcl and/or Perl for automation.
- Strong problem-solving skills and ability to work independently and lead small teams.
Education Requirements
Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or a related field. The posting lists degree-to-experience combinations: Bachelor's + 4+ years, Master's + 3+ years, or PhD + 2+ years of hardware engineering experience. Some role text also references Bachelor's/Master's with 7+ years for IC-design leadership roles. Equivalent practical experience may be considered.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
