CPU Physical Design Engineer, Senior to Senior Staff Level
QualcommJob Title
CPU Physical Design Engineer, Senior to Senior Staff Level
Role Summary
Lead physical design and implementation efforts for CPU blocks in ASIC products. Work within the ASICS/CPU engineering teams to meet power, performance, and area (PPA) targets across multi-core CPU implementations.
Collaborate with RTL, circuits, CAD, architecture, software, process, SoC and post-silicon teams to drive physical design solutions from block level through tapeout.
Experience Level
Senior to Senior Staff. Typical experience guidance: Bachelor's degree plus ~4–6 years, Master's plus ~3–4 years, or PhD plus ~2–3 years of relevant ASIC/physical design or hardware engineering experience.
Responsibilities
Key responsibilities include cross-functional collaboration and advancing physical-design methods to meet stringent CPU PPA goals.
- Collaborate with RTL, Physical Design, Circuits, CAD, Architecture, and Software teams to resolve critical physical design challenges.
- Develop and apply physical-design and optimization techniques to meet PPA targets for CPU blocks.
- Coordinate CPU use-case analysis with CPU software, architecture, and RTL teams to propose PPA improvements.
- Work with external CAD tool vendors and internal CAD teams to identify and address optimization issues.
- Partner with block-level implementation teams, process, SoC and post-silicon teams to analyze and improve design implementations and correlations.
Requirements
Must-have technical skills and practical experience; preferred items listed separately.
- Must-have: Experience with synthesis, place-and-route flows, and signoff timing and power analysis.
- Must-have: Knowledge of high-performance and low-power implementation techniques.
- Must-have: Proficiency in scripting (TCL, Python, Perl) for automation and data analysis.
- Must-have: Familiarity with industry-standard synthesis, place & route, and tapeout tool flows.
- Preferred / Nice-to-have: Experience in deep submicron process nodes and CPU PPA optimization.
- Preferred / Nice-to-have: Knowledge of standard cell libraries and cell-level optimizations.
- Preferred / Nice-to-have: Experience with pre- and post-silicon correlation and strong data-analytical debugging skills.
Education Requirements
Degrees: Bachelor's, Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, Science, Engineering or a related technical field. The posting accepts equivalent practical experience; typical experience thresholds vary (roughly Bachelor's +4–6 years, Master's +3–4 years, PhD +2–3 years).
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
