CPU Physical Design CAD Engineer (Lead/Staff/Sr Staff)
QualcommJob Title
CPU Physical Design CAD Engineer (Lead/Staff/Sr Staff)
Role Summary
Join Qualcomm's CPU physical design CAD team to build, maintain and optimize place-and-route implementation tools and flows used for high-performance custom CPUs. The role supports global CPU physical design teams and drives methodology and tool improvements to achieve best-in-class power, performance and area (PPA).
Experience Level
Senior. Typical experience expectations: roughly 6+ years with a Bachelor's, 5+ years with a Master's, or 4+ years with a PhD in a relevant field; preferred candidates have 7+ years hands-on place-and-route or CAD experience.
Responsibilities
Key responsibilities focus on developing and supporting implementation automation, methodologies and flows for CPU designs.
- Develop, integrate and release new features in the high-performance place-and-route CAD flow.
- Architect and recommend methodology improvements to optimize PPA for custom CPUs.
- Maintain, debug and support implementation flows; resolve project-specific tool and flow issues.
- Collaborate with worldwide CPU physical design teams to provide methodology guidance and achieve timing and PPA goals.
- Work with EDA vendors to define roadmaps and resolve tool issues impacting implementation flows.
Requirements
Must-have technical skills and experience; preferred items are noted.
- Must: Hands-on experience in place-and-route and implementation automation for high-performance chips.
- Must: Proficiency in scripting (Tcl) and Python for flow development and automation.
- Must: Practical experience across physical design tasks including placement, routing, timing analysis, sign-off and PDV.
- Must: Strong understanding of digital design, timing analysis and physical verification concepts.
- Preferred: Experience with advanced technology nodes (5 nm or smaller) and managing place-and-route flows at those nodes.
- Preferred: Familiarity with industry-standard place-and-route tools (for example, Cadence Innovus) and proven track record of regressing and maintaining P&R flows.
- Preferred: Experience working with EDA vendors and cross-site CPU physical design teams.
Education Requirements
Bachelor's, Master’s or PhD in Computer Science, Electrical/Electronics Engineering, Engineering or a related field. Typical minimum experience expectations: Bachelor’s +6 years, Master’s +5 years, or PhD +4 years of relevant hardware engineering or CAD experience.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
