CPU IP Design & Verification Intern – RISC-V Processor Development (Summer 2027)

Job Title

CPU IP Design & Verification Intern – RISC-V Processor Development (Summer 2027)

Role Summary

Work with the MIPS CPU IP engineering team on design and verification of RISC-V processor IP. Collaborate with architects, RTL designers, and verification engineers on microarchitecture, RTL, verification, performance analysis, automation, and debug.

Experience Level

Entry-level internship for current undergraduate or graduate students (at least sophomore). Intended as a hands-on, learning-focused role; no specific professional years of experience required.

Responsibilities

Primary responsibilities during the internship include:

• Support RISC-V CPU microarchitecture and SystemVerilog/Verilog RTL design and development.
• Contribute to CPU blocks such as instruction fetch/decode, execution, load/store, caches, memory interfaces, CSRs, exceptions, and interrupts.
• Develop verification tests, assertions, checkers, and functional coverage for CPU features.
• Run simulations and regressions, analyze failures using logs, traces, and waveforms, and perform debug.
• Verify processor functionality across instructions, privilege modes, memory operations, and corner cases.
• Support power, performance, and area analysis and optimization efforts.
• Develop automation (Python, C/C++, scripting) to improve design, verification, regression, and debug productivity.
• Document technical results and communicate findings to the engineering team.
• Follow Environmental, Health, Safety & Security requirements.

Requirements

Must-have technical skills and job requirements:

• English fluency (written and verbal).
• Ability to work at least 40 hours per week during the internship.
• Coursework or project experience in digital logic design and computer architecture.
• Familiarity with Verilog or SystemVerilog.
• Understanding of CPU fundamentals: pipelines, instruction execution, loads/stores, caches, memory hierarchy.
• Programming or scripting experience with Python, C/C++, or similar languages.
• Strong analytical, problem-solving, and debugging skills.

Nice-to-have skills:

• Prior related internship or co-op experience.
• Leadership or project ownership experience.
• Interest in leveraging AI tools for productivity and workflows.
• Knowledge of the RISC-V ISA, SystemVerilog/UVM, assertions, functional coverage, or constrained-random verification.
• Experience with CPU architecture/microarchitecture, FPGA, ASIC, or processor-design projects.
• Familiarity with caches, memory subsystems, privilege modes, exceptions, interrupts, or virtual memory.
• Experience with simulation, waveform debug, Git, and Linux.
• Exposure to synthesis, linting, clock-domain crossing analysis, formal verification, or timing analysis.
• Assembly-language programming experience and strong teamwork/communication skills.

Education Requirements

Must be at least a sophomore at time of application and actively pursuing a Bachelor's, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related technical field from an accredited program. Maintain at least a 3.0 GPA and be in good academic standing during the internship.

About the Company

Company: GlobalFoundries

Headquarters: Saratoga Springs, New York, USA

GlobalFoundries is a leading contract manufacturer for the global semiconductor industry, with facilities in multiple countries, including the USA. The company develops a broad portfolio of semiconductor technologies and employs around 13,000 people worldwide. GlobalFoundries focuses on enhancing competitiveness in specialized application solutions and fostering innovation in mobile communications, consumer electronics, and automotive applications.