CPU/Cores Post-Silicon Validation (Virtualization / Hypervisor)

Job Title

CPU/Cores Post-Silicon Validation (Virtualization / Hypervisor)

Role Summary

Staff Engineer responsible for driving post-silicon validation of CPU cores using virtualization and hypervisor-based workloads to uncover core microarchitecture issues under production-like stress.

The role works across design, microcode/firmware, BIOS, and platform teams to triage failures, provide actionable debug data, and improve silicon readiness.

Experience Level

Senior (Staff Engineer). Specific years of experience not stated.

Responsibilities

Primary responsibilities focus on designing, executing, and scaling virtualization-based post-silicon validation to expose and debug core-level defects.

• Execute post-silicon core validation using virtualization-based workloads and customer-representative scenarios.
• Configure, deploy, and debug workloads on hypervisors (KVM, VMware ESXi, Hyper-V, Xen) across Linux and Windows.
• Design and run VM-based stress tests (migration, pause/resume, overcommit, multi-VM contention, long-run soak, reset scenarios).
• Analyze system failures and triage issues across core microarchitecture, microcode/firmware, BIOS, DF/UMC, and platform interactions.
• Correlate failures using logs, MCA, MSRs, debug hooks, and available post-silicon observability.
• Collaborate with design and architecture teams to provide actionable debug data and validation feedback.
• Contribute to automation and scalable execution infrastructure for large-scale virtualization runs; track coverage, execution hours, and defect trends.

Requirements

Core technical skills and experience required; preferred qualifications listed separately.

• Must-have: Strong hands-on experience with virtualization technologies and hypervisors (KVM, VMware ESXi, Hyper-V, Xen).
• Must-have: Solid understanding of x86 CPU architecture and core microarchitectural concepts.
• Must-have: Experience with Linux internals (scheduler, memory management, interrupts) and system-level debugging.
• Must-have: Familiarity with post-silicon validation, silicon bring-up, or system validation and ability to debug complex HW/SW boundary issues.
• Must-have: Ability to correlate failures using logs, MCA, MSRs, and limited post-silicon observability.
• Nice-to-have: Prior experience in CPU cores post-silicon validation or focused core stress testing.
• Nice-to-have: Knowledge of microcode, BIOS, firmware, and platform initialization flows.
• Nice-to-have: Exposure to customer-like server or client virtualization workloads and large-scale validation infrastructure/automation frameworks.
• Nice-to-have: Strong data analysis and root-cause skills for low-frequency, long-run failures.

Education Requirements

Required: Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related field. (The posting lists both Bachelor’s and Master’s degrees as qualifications.)

About the Company

Company: Advanced Micro Devices

Headquarters: Sunnyvale, California, USA

Advanced Micro Devices, or AMD, is a global semiconductor company that designs and manufactures microprocessors, graphics processors, and related technologies for a variety of computing devices. Known for pushing the boundaries of innovation, AMD's mission is to deliver high-performance computing solutions for AI, data centers, gaming, and embedded applications. They foster a collaborative, inclusive culture focused on creativity and problem-solving, aiming to drive progress and excellence in technology.