CPU Core Design Verification Test Generator Lead

Job Title

CPU Core Design Verification Test Generator Lead

Role Summary

Lead development of CPU-focused test generators and verification strategy for high-performance out-of-order RISC-V cores. The role covers generator design, infrastructure, and execution across pre-silicon and post-silicon environments.

Work within a small engineering team and collaborate with design, DV, architecture, emulation, and post-silicon teams to validate ISA and microarchitectural behavior.

Experience Level

Senior — typically 8+ years of CPU design verification, test generation, or closely related CPU validation experience. Candidates will be assessed during interview for final leveling and offer.

Responsibilities

Primary responsibilities include ownership of generator strategy, implementation, and verification execution.

• Lead development of CPU core-level test generators for high-performance out-of-order RISC-V cores.
• Define and own generator methodology, infrastructure, and verification strategy for ISA and microarchitectural validation in pre- and post-silicon stages.
• Create directed and randomized stimulus targeting architectural corner cases, instruction interactions, and complex CPU behavior.
• Support RISC-V certification efforts, including test content, compliance flows, debug, and closure.
• Guide and mentor a small team (approximately 4–5 engineers) while remaining hands-on with implementation and debug.
• Collaborate with design, DV, architecture, emulation, and post-silicon teams to scale generator infrastructure across core, cluster, and chip-level environments.

Requirements

Must-have technical skills and experience for successful performance in this role.

• 8+ years in CPU design verification, test generation, or closely related CPU validation work.
• Proven experience leading development of test generators for x86, ARM, or RISC-V ISA environments.
• Deep understanding of CPU ISA behavior, privileged architecture, and high-performance out-of-order CPU microarchitecture.
• Experience building tools, stimulus, and automation that scale verification across large CPU programs and environments.
• Experience with pre-silicon and post-silicon verification flows, including emulation and debug.
• Demonstrated communication and collaboration across design, DV, architecture, emulation, and post-silicon teams.
• Prior experience leading or mentoring a small engineering team while contributing hands-on.

Education Requirements

Not specified.

About the Company

Company: Tenstorrent

Headquarters: Austin, Texas, United States

Tenstorrent is a technology company focused on designing innovative computing solutions. They are known for their expertise in the development of advanced hardware, including ASICs and SoCs, aimed at enhancing performance and efficiency in various applications.