CPU Architect and Design - MMU & Security

Job Title

CPU Architect and Design - MMU & Security

Role Summary

Hands-on CPU hardware architect and designer responsible for defining and implementing CPU features in MMU, security, memory protection, and virtualization. The role covers architecture, microarchitecture, RTL implementation, integration, and verification to meet functional, performance, power, and area goals.

Experience Level

Entry-level. Typical guidance: 1–2+ years of relevant engineering experience depending on degree (see Education Requirements).

Responsibilities

Contribute across architecture, microarchitecture, and RTL implementation for CPU features focused on memory management and security.

• Design and define CPU features and modules for MMU, security, address translation, TLBs, page-table walks, virtualization, isolation, and memory protection.
• Analyze architectural requirements and system constraints; evaluate alternatives and define microarchitectural solutions.
• Perform hands-on RTL design, implementation, integration, debug, optimization, and closure to meet performance, power, and area targets.
• Define and review hardware interfaces, behaviors, flows, and mechanisms across module, CPU, and system boundaries.
• Write and review architecture, microarchitecture, and design specifications; ensure consistency from intent to RTL.
• Investigate complex technical problems and drive cross-boundary solutions and tradeoffs.

Requirements

Must-have technical skills and experience to perform the role; preferred items listed separately.

• Hands-on RTL design and implementation experience with complex hardware blocks or features.
• Experience translating architectural requirements or high-level specifications into microarchitecture.
• Ability to work across architecture, microarchitecture, and design abstraction levels.
• Experience with technical specifications, design reviews, requirement definition, and cross-functional technical discussions.
• Familiarity with processor systems, memory subsystems, and bus/interconnect architectures.
• Proven track record driving designs to meet functional, performance, power, and area goals.
• Strong analytical, problem-solving, communication, and teamwork skills.

Nice-to-have:

• Experience with CPU, MMU, LSU, cache, interconnect, or related hardware block design and microarchitecture.
• Experience taking complex hardware features from requirements through microarchitecture and RTL implementation.
• Familiarity with security architecture topics such as isolation, privilege/security mechanisms, secure execution, or memory safety.
• Good understanding of virtual memory, address translation, TLBs, page-table walks, virtualization, and CPU/SoC architecture.

Education Requirements

Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field (with 2+ years relevant experience), or a Master’s in those fields (with 1+ year experience), or a PhD in a related field. Equivalent practical experience will be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.